IPC@CHIP® RTOS-PPC – API Documentation

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RTI Rate Adjustment

The @CHIP-RTOS-PPC Real-Time Interrupt (RTI) rate can be increased above its default rate of 1 kHz up to a maximum rate of 500 kHz. This configuration is controlled by the CHIP.INI file [TIMER] RTI entry.

When to use a higher RTI rate

For applications that require higher resolution scheduling it makes sense to raise the system's clock interrupt rate. The following additional C-library functions can then be used to take advantage of the resulting increased scheduling resolution.

Task Scheduling

RTX_Sleep_Fine() - Sleep a specified number of RTI
RTX_Sleep_Long() - Sleep a specified long number of RTI

High Resolution RTX Timers

RTX_NewFineTimerCB() - Creates a high resolution timer callback
RTX_Timer_Delay_RTI() - Specifies delay to next timer callback in RTI ticks

When not to use a higher RTI rate

If your application needs an accurate sense of time, this alone is not a justification for increasing the system's real-time interrupt rate. The system time resolved to microseconds is available from the C-library functions. These functions do not require that the real-time interrupt rate be raised above the default 1 kHz rate.

High Resolution System Time

readTB() - Get system time with sub microsecond resolution
readTBx() - Get system time with range extended to 64 bits.

CPU loading considerations with higher RTI rate

It should not be surprising that the load placed on the CPU increases when the RTI service rate is increased. What loads down the CPU in particular is when tasks or RTX timer callbacks become due at a high rate. For example if a timer callback is scheduled for each RTI tick, then the CPU quickly becomes swamped by this activity alone as can be seen by the example measurements in the table below.

On the other hand, a high RTI rate with sparsely scheduled tasks does not load the CPU that much.

The following table of measurements may help provide a general idea what rates of activity you can expect to achieve when raising the system's RTI rate. These measurements were made with the _DBG PROBE task executing concurrently with a simple test program which installed an RTX timer to be called at specified RTI tick intervals. Most of the measurements are made for kernel timer callbacks operating in User mode. The measurements in parenthesis were made with the kernel timer callbacks operating in Supervisor mode. As can be seen here, the Supervisor mode callbacks place slightly less load on the computer than do the User mode callbacks.

RTI Rate

Idle

2 ticks

1 tick

1 kHz

0.283%

0.374%

0.460%

5 kHz

0.027%

0.702%

1.11%

20 kHz

0.284%

2.00%

3.68%

50 kHz

0.318%

4.61%

8.79%

100 kHz

0.379%

8.84% (6.95%)

17.3% (13.4%)

200 kHz

0.505%

17.7% (13.6%)

34.4% (26.5%)

500 kHz

0.858%

55.6% (35.7%)

dead (100%)

The Idle column in the table indicates the load with only the system tasks executing prior to starting the test program that operates the RTX timer. The "2 ticks" column is for the case where the timer interval is set to two RTI ticks. Likewise, for the "1 ticks" column the timer callback is executed on every RTI tick.

Note that you can configure a system which will appear to not start (from a TCP/IP point of view) by setting the RTI rate high enough and starting a program from the AUTOEXEC.BAT which configures a timer at too high a callback rate. This was the case for trials in the above table where a "dead" indication appears. So some care will be required when operating at higher RTI rates.

Also it must be noted that the system can require significantly more time to service the RTI than the above table indicates when the instruction and data cache hit rate is lower than on the nearly idle test system which these measurements were made. Applications which require a very high frequency front end will probably need to use some cache locking techniques which are beyond the scope of the @CHIP-RTOS-PPC API.

Operating the system with too high an RTI setting can result in the system resetting due to a Interrupt Request Blocks exhausted shut down fault.






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