The following definitions are provided to assure a compatibility to previous @CHIP-RTOS operation systems and targets.
Defines |
| #define | spi_init_hw(a, b) spiInit(0, a, b) |
| | Legacy API, mapped to spiInit().
|
| #define | spi_write(a, b) spiWrite(0, a, b) |
| | Legacy API, mapped to spiWrite().
|
| #define | spi_write_hw(a, b) spiWrite(0, a, b) |
| | Legacy API, mapped to spiWrite().
|
| #define | spi_read(a, b) spiRead(0, a, b) |
| | Legacy API, mapped to spiRead().
|
| #define | spi_read_hw(a, b) spiRead(0, a, b) |
| | Legacy API, mapped to spiRead().
|
| #define | spi_read_write(a, b, c) spiReadWrite(0, a, b, c) |
| | Legacy API, mapped to spiReadWrite().
|
| #define | spi_read_write_hw(a, b, c) spiReadWrite(0, a, b, c) |
| | Legacy API, mapped to spiReadWrite().
|
| #define | spi_waiton_sem() spiReserveBus(0, -1, -1, 0, FIXED_WAIT_PRIORITY) |
| | Legacy API, mapped to spiReserveBus().
|
| #define | spi_waiton_sem_setmode(a, b) spiReserveBus(0, a, b, 0, FIXED_WAIT_PRIORITY) |
| | Legacy API, mapped to spiReserveBus().
|
| #define | spi_release_sem() spiReleaseBus(0) |
| | Legacy API, mapped to spiReleaseBus().
|
| #define | spi_slave_init(a) spiSlaveInit(0, a) |
| | Legacy API, mapped to spiSlaveInit().
|
| #define | spi_slave_write(a) spiSlaveWrite(0, a) |
| | Legacy API, mapped to spiSlaveWrite().
|
| #define | spi_slave_read() spiSlaveRead(0) |
| | Legacy API, mapped to spiSlaveRead().
|
| #define | spi_slave_read_write(a) spiSlaveReadWrite(0, a) |
| | Legacy API, mapped to spiSlaveReadWrite().
|
