IPC@CHIP® RTOS-PPC – API Documentation

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void* csSetMode ( int  cs,
CsSettings settings 
)

Setup basic settings for a local bus chip select.

Parameters:
cs Chip select number (1=CS1, 3=CS3, 6=CS6, 7=CS7)
settings Chip select settings, see CsSettings
Note:
This function will insert default wait states (8 WS for read/write) and deadcycles (3 cycles). Function will also remove all other advanced options like byte swapping and burst.
Valid non-muxed bus mode settings

Mode Name

Address Size

Data Size

Memory Size

Small

8

8

256 Bytes

Small

8

16

256 Bytes

Small

16

8

64 KBytes

Small

16

16

64 KBytes

Medium

24

8

16 MBytes

MOST/Graphics

24

32

16 MBytes

Large Flash

26

8

64 MBytes

Large Flash

26

16

64 MBytes

Valid muxed bus mode settings

Mode Name

Address Size

Data Size

Memory Size per Bank

Memory Size Total

Legacy

8

8

256 Bytes

1 KBytes

Legacy

8

16

256 Bytes

1 KBytes

Legacy

8

32

256 Bytes

1 KBytes

Legacy

16

8

64 KBytes

256 KBytes

Legacy

16

16

64 KBytes

256 KBytes

Legacy

16

32

64 KBytes

256 KBytes

Legacy

24

8

16 MBytes

64 MBytes

Legacy

24

16

16 MBytes

64 MBytes

Legacy

24

32

16 MBytes

64 MBytes

Legacy

25

8

32 MBytes

128 MBytes

Legacy

25

16

32 MBytes

128 MBytes

Legacy

25

32

32 MBytes

128 MBytes

Returns:
Pointer to memory area, which is used to address this chip select, NULL on error
Example:
// Example for DB240 I/Os (chip select = 1, multiplexed bus, 24 addresses, 8 data bits)

#define CHIP_SELECT          1     // Chip select to use
#define OFFSET_LED_WRITE     0     // Offset of LED output register
#define OFFSET_DIP_READ      0     // Offset of dip switch input register
#define OFFSET_LED_READ      1     // Offset of LED input register
#define OFFSET_CPLD_VERSION  2     // Offset of CPLD version input register


CsSettings csSettings;             // Chip select settings data structure 
unsigned char *gBaseAddr;          // Hardware base address
unsigned char inVal;               // Dip switches input value
unsigned char outVal = 0xAA;       // LED output value

// ---------------------------------------------------------------------------
// Initialize hardware
// ---------------------------------------------------------------------------
csSettings.mux       = TRUE;       // Use muxed bus mode
csSettings.ack       = FALSE;      // Ignore ack input 
csSettings.longAle   = TRUE;       // Use long ALE
csSettings.addrSize  = 2;          // 24 bit address bus
csSettings.dataSize  = 0;          //  8 bit data bus 
csSettings.bankBits  = 0;          // AD[26:25] during address tenure
csSettings.writeOnly = FALSE;      // Read/Write access
csSettings.readOnly  = FALSE;      // Read/Write access

gBaseAddr = (unsigned char *)csSetMode(CHIP_SELECT, &csSettings);

if (!gBaseAddr)
    printf("\nError: Could not set chip select mode.");
if (!csEnable(CHIP_SELECT, TRUE))
    printf("\nError: Could not enable chip select.");


// ---------------------------------------------------------------------------
// Read inputs
// ---------------------------------------------------------------------------
inVal = gBaseAddr[OFFSET_DIP_READ];

// ---------------------------------------------------------------------------
// Write outputs
// ---------------------------------------------------------------------------
gBaseAddr[OFFSET_LED_WRITE] = outVal;
Since:
SC2x3 V1.00 - CLIB V1.00
See also:
csEnable() csSetWaitStates()





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