IPC@CHIP® RTOS-PPC – API Documentation

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void i2cSetSpeed ( BYTE  idx,
unsigned int  value 
)

This function can be called to setup the I2C clock frequency and SDA/SCL hold timings.
Default is value 0x92, see below.

Parameters:
idx I2C bus interface index (0=I2C1 or 1=I2C2)
value Timing parameter (for full specs refer to the Freescale documentation):

Value

SCL period

SDA Hold

SCL Hold (start)

SCL Hold (stop)

0xB9

42,96875 kHz / 3072 clks

1,96697 us / 260 clks

11,57576 us / 1528 clks

11,66667 us / 1540 clcks

0x7B

64,45313 kHz / 2048 clks

1,96697 us / 260 clks

7,69697 us / 1016 clks

7,78788 us / 1028 clcks

0x92

85,9375 kHz / 1536 clks

1,96697 us / 260 clks

5,75758 us / 760 clks

5,84848 us / 772 clcks

0x3C

103,125 kHz / 1280 clks

0,97727 us / 129 clks

4,83333 us / 638 clks

4,85606 us / 641 clcks

0x74

206,25 kHz / 640 clks

0,5 us / 66 clks

2,39394 us / 316 clks

2.43939 us / 322 clcks

0x4F

275 kHz / 480 clks

0,5 us / 66 clks

1,78788 us / 236 clks

1,83333 us / 242 clcks

0x89

375 kHz / 352 clks

0,51515 us / 68 clks

1,15152 us / 152 clks

1,36364 us / 180 clcks

Returns:
Nothing
Note:
The I2C specification requires the following settings:
Standard mode:
SCL frequency: <= 100 kHz, SDA Hold: 0,3 - 3,45 us, SCL Hold(start): >= 4 us, SCL Hold(stop): >= 4 us

Fast mode:
SCL frequency: <= 400 kHz, SDA Hold: 0,3 - 0,9 us, SCL Hold(start): >= 0,6 us, SCL Hold(stop): >= 0,6 us
Since:
SC2x3 V1.00 - CLIB V1.00
See also:
i2cInit()





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