IPC@CHIP® RTOS-PPC – API Documentation

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Atomic Memory Editing Functions

Detailed Description

These set of inline assembly functions use the PowerPC's built in semaphore instructions, LWARX and STWCX., to assure thread safe editing of a 32 bit memory value. In order for this protection mechanism to work, the programmer must assure that all potentially concurrent acceses to the respective memory location use these type of atomic editing functions.

These inline functions provide an alternative to using an RTX semaphore. No kernel object is required by these inline methods. These inline functions can safely be used in interrupt service routines or from within a task.

Note that the @CHIP-RTOS-PPC clears the CPU's reservation set by the LWARX instruction at each task switch. This is done to assure that there is never a dangling reservation from some other task which might have been deleted or time-sliced in the middle of one of these "atomic" sequences.

These functions cover the common actions taken on 32 bit objects. The user is free to extend this set of functions by writing their own inline assembly functions in a similar manner. Please note that it is essential that the STWCX. instruction always be executed following a LWARX instruction in order that a reservation not be left hanging, because to do so could cause a malfunction in other critical sections in the system which are using this method of protection.

The @CHIP-RTOS-PPC protects tasks from this programming error by always executing a STWCX. instruction prior to resuming a blocked task. However the system is not protected against this programming error made in interrupt service handlers. So extra care is required, as always when writing interrupt service procedures since the scope of the damage done by programming errors would not confined to the current application program.

All 32 bit objects on which these functions are applied must reside on a DWORD boundary or an alignment exception will occur. (This is the compiler's default alignment for DWORD objects, so normally this requirement should cause no problems.)


static DWORD atomicAdd (DWORD_ATOM *ptr, int value)
 Atomic addition of 32 bit values.
static DWORD atomicXor (DWORD_ATOM *ptr, DWORD bits)
 Atomic bitwise XOR.
static DWORD atomicModify (DWORD_ATOM *ptr, DWORD mask, DWORD new_value)
 Atomic modify selected bits in a 32 bit memory location.
static DWORD atomicReadWrite (DWORD_ATOM *ptr, DWORD value)
 Atomic test and write a 32 bit memory location.
static DWORD atomicReset (DWORD_ATOM *ptr, DWORD mask)
 Atomic reset selected bits in a 32 bit memory location.
static DWORD atomicSet (DWORD_ATOM *ptr, DWORD mask)
 Atomic set selected bits in a 32 bit memory location.
static void atomicWrite (DWORD_ATOM *ptr, DWORD value)
 Write to a 32 bit memory location in a cooperative manner.

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